This invention relates to a semiconductor manufacturing apparatus and in particular to a semiconductor manufacturing apparatus in which circuit patterns are etched on a semiconductor wafer by a plasma reaction.
This invention relates to TI copending U.S. patent applications Ser. Nos.: 663,907; 663,901; 664,448; 663,903; which by reference are 663,904; 663,804; 663,805; 663,905; 663,906; and 663,908 reference are incorporated herein. Copending application Ser. No. 664,448 was filed on Oct. 24, 1984 while the other copending cases were all filed on Oct. 22, 1984.
The manufacturing of semiconductor devices such as a 256K RAM or even up to a 1 megabit RAM device require precision dry etching with high repeatability, low particulate levels, reliable endpoint detection, multiple process capability and reliable feedback control to a microprocessor controller for reliable systems execution. An example of a prior art plasma reactor system is described in U.S. Pat. No. 3,757,733 which is assigned to the assignee of the present invention.
In the prior art systems, the transportation of silicon wafers through a plasma reactor required an opening in the reactant chamber that is large enough for the wafer to pass through. The mechanism that are typically used create particles that potentially impact yield of devices the semiconductor wafers that are processed.
Chlorine and bromine gases which are typically used in the process during plasma etching are highly corrosive to the components that are used to build the plasma reactors. Over a long term operation, reactor components exposed to the plasma must be constructed of materials that are resistance to the corrosive effects of the plasma. Aluminum is an excellent material of construction for a plasma reactor, especially when it is protected by anodization. However, during etching, when a semiconductor or silicon wafer is placed on a substrate assembly that is anodized and used as an electrode, the substrate is protected from the plasma by the silicon wafer. However, each silicon wafer has a slice or flat to allow for crystallographic orientation. If the slice is placed on the substrate with random orientation of the flat, an annulus of equal width of the flat width plus the placement tolerance will in general be exposed to the plasma. Anodizing the whole substrate is impractical in that it is conductive towards the RF electrical power used in the plasma reactor. However, it is an insulator towards DC. It is known that electrically floating objects such as silicon wafers covered with oxides exposed to a plasma will acquire an electrical potential, the floating potential, above the ground of the system. It has been observed in production that an electrostatic repulsion develops between the wafer and the semiconductor substrate causing the wafer to randomly drift off its alignment position on the substrate.
Although several commercially available automatic wafer etch reactors use a confined plasma, none of the known systems provide a small gap which will not support a plasma and therefore confine the plasma within the small gap, use the same gap for both pumping the exhaust of gases from the reactors and for transporting the semiconductor wafers into the reactant chamber and thus keeping the reactant chamber simple and free of poorly controlled dead spaced within the reactor chamber.
Additionally, it has been determined that the gap between the collimator or electrode and substrate during process should be approximately around 0.040 inch for oxide processing. With a non-load locked system, the process chamber is vented to atmosphere which allows the electrode and collimater to move up to between 0.030 and 0.040 inch and the semiconductor wafer passes under the collimater. This is unreliable due to the fact that an inconsistent gap can now be achieved and the slice levitation varies, also, an automatic transportation system is impractical with the above operation. And in particular, the single slice dioxide and oxide etch processes have historically used the highest possible density to remove silicon dioxide. This elevated power density is far more difficult to control than any other type of etching operation. Also, highly selective etch processing often builds up deposits in the reactors. For this reason, these processes have tended to be limited in commercial applications.